torc::bitstream::Spartan6 Class Reference

Spartan6 bitstream. More...

#include <Spartan6.hpp>

Inheritance diagram for torc::bitstream::Spartan6:

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Collaboration diagram for torc::bitstream::Spartan6:

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List of all members.

Public Types

enum  ERegister {
  eRegisterCRC = 0, eRegisterFARMAJ, eRegisterFARMIN, eRegisterFDRI,
  eRegisterFDRO, eRegisterCMD, eRegisterCTL, eRegisterMASK,
  eRegisterSTAT, eRegisterLOUT, eRegisterCOR1, eRegisterCOR2,
  eRegisterPWRDN_REG, eRegisterFLR, eRegisterIDCODE, eRegisterCWDT,
  eRegisterHC_OPT_REG, eRegisterCSBO, eRegisterGENERAL1, eRegisterGENERAL2,
  eRegisterGENERAL3, eRegisterGENERAL4, eRegisterGENERAL5, eRegisterMODE_REG,
  eRegisterPU_GWE, eRegisterPU_GTS, eRegisterMFWR, eRegisterCCLK_FREQ,
  eRegisterSEU_OPT, eRegisterEXP_SIGN, eRegisterRDBK_SIGN, eRegisterBOOSTS,
  eRegisterEYE_MASK, eRegisterCBC_REG, eRegisterCount
}
 Configuration register enumeration. More...
enum  ECommand {
  eCommandNULL = 0, eCommandWCFG, eCommandMFW, eCommandLFRM,
  eCommandRCFG, eCommandSTART, eCommandRCRC = 7, eCommandAGHIGH,
  eCommandGRESTORE = 10, eCommandSHUTDOWN, eCommandDESYNC = 13, eCommandIPROG,
  eCommandCount
}
 Configuration command enumeration for eRegisterCMD. More...
enum  EFarMaj {
  eFarMajMaskBlock = 0xf000, eFarMajShiftBlock = 12, eFarMajMaskRow = 0x0f00, eFarMajShiftRow = 8,
  eFarMajMaskMajor = 0x00ff, eFarMajShiftMajor = 0
}
 Frame Address Register Major subfields. More...
enum  EFarMin { eFarMinMaskBlock = 0xc000, eFarMinShiftBlock = 12, eFarMinMaskMinor = 0x01ff, eFarMinShiftMinor = 0 }
 Frame Address Register Minor subfields. More...
enum  EFarBlockType {
  eFarBlockType0 = 0, eFarBlockType1, eFarBlockType2, eFarBlockType3,
  eFarBlockType4, eFarBlockType5, eFarBlockType6, eFarBlockType7,
  eFarBlockTypeCount
}
 Frame Address Register top and bottom constants. More...
enum  { eFrameLength = 41 }
 Frame length. More...

Static Public Member Functions

static uint16_t makeSubfield (ERegister inRegister, const std::string &inSubfield, const std::string &inSetting)
 Return the masked value for a subfield of the specified register.

Protected Types

typedef boost::uint16_t uint16_t
 Imported type name.
typedef boost::uint32_t uint32_t
 Imported type name.

Static Protected Attributes

static const char * sPacketTypeName [ePacketTypeCount]
 Packet type names.
static const char * sOpcodeName [eOpcodeCount]
 Packet opcode names.
static const char * sRegisterName [eRegisterCount]
 Configuration register names.
static const char * sCommandName [eCommandCount]
 Configuration command names.
static const Subfield sCOR1 []
 Configuration Options Register 1 (COR1) subfields.
static const Subfield sCOR2 []
 Configuration Options Register 2 (COR2) subfields.
static const Subfield sSTAT []
 Status Register (STAT) subfields.
static const Subfield sCTL []
 Control Register 0 (CTL0) subfields.
static const Subfield sMASK []
 Control Mask Register (MASK) subfields.
static const Subfield sPWRDN_REG []
 Suspend Register (PWRDN_REG) subfields.
static const Subfield sHC_OPT_REG []
 HC_OPT_REG Register (PWRDN_REG) subfields.
static const Subfield sMODE_REG []
 Mode Register (Mode) subfields.
static const Subfield sBOOSTS []
 BOOSTS Register (BOOSTS) subfields.
static const Subfield sSEU_OPT []
 SEU_OPT Register (SEU_OPT) subfields.

Friends

class torc::bitstream::bitstream::Spartan6UnitTest
std::ostream & operator<< (std::ostream &os, const Spartan6 &rhs)
 Insert the bitstream header into an output stream.

Classes

class  FrameMajorAddress
class  FrameMinorAddress

Detailed Description

Spartan6 bitstream.

Definition at line 31 of file Spartan6.hpp.

Member Typedef Documentation

typedef boost::uint16_t torc::bitstream::Spartan6::uint16_t [protected]

Imported type name.

Reimplemented from torc::bitstream::Spartan6Bitstream.

Definition at line 36 of file Spartan6.hpp.

typedef boost::uint32_t torc::bitstream::Spartan6::uint32_t [protected]

Imported type name.

Reimplemented from torc::bitstream::Spartan6Bitstream.

Definition at line 37 of file Spartan6.hpp.

Member Enumeration Documentation

enum torc::bitstream::Spartan6::ERegister

Configuration register enumeration.

See also:
configuration registers: UG380, v2.2, July 30, 2010 Table 5-30

Definition at line 43 of file Spartan6.hpp.

enum torc::bitstream::Spartan6::ECommand

Configuration command enumeration for eRegisterCMD.

See also:
CMD register commands: UG380, v2.2, July 30, 2010 Table 5-33

Definition at line 53 of file Spartan6.hpp.

enum torc::bitstream::Spartan6::EFarMaj

Frame Address Register Major subfields.

See also:
Frame Address Register Major Description: UG380, v2.2, July 30, 2010 Table 5-31

Definition at line 59 of file Spartan6.hpp.

enum torc::bitstream::Spartan6::EFarMin

Frame Address Register Minor subfields.

See also:
Frame Address Register Minor Description: UG380, v2.2, July 30, 2010 Table 5-32

Definition at line 67 of file Spartan6.hpp.

enum torc::bitstream::Spartan6::EFarBlockType

Frame Address Register top and bottom constants.

Frame Address Register block type constants.

Definition at line 75 of file Spartan6.hpp.

anonymous enum

Frame length.

Constant frame length of 41 32-bit words for the entire Spartan6 family. Note that this length applies only to non-IOB frames. IOB frame lengths are defined by the bitstream FLR register plus one.

Definition at line 81 of file Spartan6.hpp.

Member Function Documentation

uint16_t torc::bitstream::Spartan6::makeSubfield ( ERegister  inRegister,
const std::string &  inSubfield,
const std::string &  inSetting 
) [static]

Return the masked value for a subfield of the specified register.

Definition at line 327 of file Spartan6.cpp.

Friends And Related Function Documentation

std::ostream& operator<< ( std::ostream &  os,
const Spartan6 &  rhs 
) [friend]

Insert the bitstream header into an output stream.

Definition at line 215 of file OutputStreamHelpers.cpp.

Member Data Documentation

const char * torc::bitstream::Spartan6::sPacketTypeName [static, protected]

Initial value:

 {
        "[UNKNOWN TYPE 0]", "TYPE1", "TYPE2", "[UNKNOWN TYPE 3]", "[UNKNOWN TYPE 4]", 
        "[UNKNOWN TYPE 5]", "[UNKNOWN TYPE 6]", "[UNKNOWN TYPE 7]"
    }
Packet type names.

Definition at line 87 of file Spartan6.hpp.

const char * torc::bitstream::Spartan6::sOpcodeName [static, protected]

Initial value:

 {
        "NOP", "READ", "WRITE", "RESERVED"
    }
Packet opcode names.

Definition at line 89 of file Spartan6.hpp.

const char * torc::bitstream::Spartan6::sRegisterName [static, protected]

Initial value:

 {
        "CRC", "FARMAJ", "FARMIN", "FDRI", "FDRO", "CMD", "CTL", "MASK", "STAT", "LOUT", "COR1", "COR2", "PWRDN_REG", "FLR",
        "IDCODE", "CWDT", "HC_OPT_REG", "CSBO", "GENERAL1", "GENERAL2", "GENERAL3", "GENERAL4", "GENERAL5", "MODE_REG",
        "PU_GWE", "PU_GTS", "MFWR", "CCLK_FREQ", "SEU_OPT", "EXP_SIGN", "RDBK_SIGN", "BOOSTS", "EYE_MASK", "CBC_REG"
    }
Configuration register names.

Definition at line 91 of file Spartan6.hpp.

const char * torc::bitstream::Spartan6::sCommandName [static, protected]

Initial value:

 {
        "NULL", "WCFG", "MFW", "LFRM", "RCFG", "START", "[UNKNOWN COMMAND 6]", "RCRC", "AGHIGH", "[UNKNOWN COMMAND 9]", 
        "GRESTORE", "SHUTDOWN", "[UNKNOWN COMMAND 12]", "DESYNC", "IPROG"
    }
Configuration command names.

Definition at line 93 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sCOR1 [static, protected]

Initial value:

 {
        {0x0003, 0, "StartupClk", "SSCLKSRC", 0,
            
            
            VALUES{"Cclk", "UserClk", "JtagClk", "TCK", 0}},
        {0x0004, 2, "DriveDone", "DRIVE_DONE", 0,
            
            
            VALUES{"No", "Yes", 0}}, 
        {0x0008, 3, "DonePipe", "DONE_PIPE", 0,
            
            
            VALUES{"No", "Yes", 0}},
        {0x0010,  4, "CRC_Bypass", "CRC_BYPASS", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0x1000, 15, "Drive_Awake", "DRIVE_AWAKE", 0,
            
            
            VALUES{"0", "1", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Configuration Options Register 1 (COR1) subfields.

See also:
Configuration Options Register Description: UG380, v2.2, July 30, 2010, Table 5-36

Definition at line 95 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sCOR2 [static, protected]

Initial value:

 { 
        {0x0007,  0, "GWE_cycle", "GWE_CYCLE", 6,
            
            
            VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
        {0x0038,  3, "GTS_cycle", "GTS_CYCLE", 5,
            
            
            VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
        {0x01c0,  6, "LCK_cycle", "LOCK_CYCLE", 7,
            
            
            VALUES{"1", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "NoWait", 0}},
        {0x0E00,  9, "DONE_cycle", "DONE_CYCLE", 4,
            
            
            VALUES{"[UNDEFINED 0]", "2", "3", "4", "5", "6", "[UNDEFINED 6]", "[UNDEFINED 7]", 0}},
        {0x8000, 15, "Reset_on_err", "RESET_ON_ERROR", 0,
            
            
            VALUES{"Disable", "Enable", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Configuration Options Register 2 (COR2) subfields.

See also:
Configuration Options Register Description: UG380, v2.2, July 30, 2010, Table 5-36

Definition at line 97 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sSTAT [static, protected]

Status Register (STAT) subfields.

See also:
Status Register Description: UG380, v2.2, July 30, 2010, Table 5-35
Note:
The "bitgen" names attempt to mimic the general bitgen convention.

Definition at line 99 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sCTL [static, protected]

Initial value:

 { 
        {0x0002,  1, "CRC_EXTSTAT_DISABLE", "CRC_EXTSTAT_DISABLE", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0x0004,  2, "USE_EFUSE_KEY", "USE_EFUSE_KEY", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0x0008,  3, "Persist", "PERSIST", 0, 
            
            
            VALUES{"No", "Yes", 0}},
        {0x0030,  4, "Security", "SBITS", 0, 
            
            
            
            VALUES{"None", "Level1", "Level2", "Level2", 0}},
        {0x0040,  6, "DEC", "DEC", 0, 
            
            
            VALUES{"No", "Yes", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Control Register 0 (CTL0) subfields.

See also:
Control Register Description: UG380, v2.2, July 30, 2010, Table 5-34

Definition at line 101 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sMASK [static, protected]

Initial value:

 { 
        {0x0001,  0, "RESERVED", "RESERVED", 0, VALUES{"Protected", "Writable", 0}},
        {0x0002,  1, "CRC_EXTSTAT_DISABLE", "CRC_EXTSTAT_DISABLE", 0, VALUES{"Protected", "Writable", 0}},
        {0x0004,  2, "USE_EFUSE_KEY", "USE_EFUSE_KEY", 0, VALUES{"Protected", "Writable", 0}},
        {0x0008,  3, "Persist", "PERSIST", 0, VALUES{"Protected", "Writable", 0}},
        {0x0030,  4, "Security", "SBITS", 0, 
            VALUES{"Protected", "[UNKNOWN 1]", "[UNKNOWN 2]", "Writable", 0}},
        {0x0040,  6, "DEC", "DEC", 0, VALUES{"Protected", "Writable", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Control Mask Register (MASK) subfields.

See also:
Control Mask Register Description: Inferred from Table 5-34

Definition at line 103 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sPWRDN_REG [static, protected]

Initial value:

 { 
        {0x0001,  0, "KEEP_SCLK", "KEEP_SCLK", 1, 
            
            
            
            VALUES{"0", "1", 0}},
        {0x0004,  2, "EN_PWRDN", "EN_PWRDN", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0x0010,  4, "EN_PGSR", "EN_PGSR", 0, 
            
            
            
            VALUES{"No", "Yes", 0}},
        {0x0020,  5, "FILTER", "FILTER_B", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0x4000,  14, "EN_EYES", "EN_EYES", 0, 
            
            
            VALUES{"Disable", "Enable", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Suspend Register (PWRDN_REG) subfields.

See also:
Suspend Register Description: UG380, v2.2, July 30, 2010, Table 5-37

Definition at line 105 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sHC_OPT_REG [static, protected]

Initial value:

 { 
        {0x0040,  6, "INIT_SKIP", "INIT_SKIP", 0, 
            
            
            VALUES{"0", "1", 0}},
        {0, 0, 0, 0, 0, 0}
    }
HC_OPT_REG Register (PWRDN_REG) subfields.

See also:
HC_OPT_REG Register Description: UG380, v2.2, July 30, 2010, Table 5-40

Definition at line 107 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sMODE_REG [static, protected]

Initial value:

 { 
        {0x0080,  0, "BOOTVSEL", "BOOTVSEL", 0, 
            
            
            VALUES{"[READ ONLY]", 0}},
        {0x0400,  8, "BOOTMODE", "BOOTMODE", 1, 
            
            
            VALUES{"0", "1", 0}},
        {0x1000,  11, "BUSWIDTH", "BUSWIDTH", 0, 
            
            
            VALUES{"0", "1", "2", 0}},
        {0x2000,  13, "NEW_MODE", "NEW_MODE", 0, 
            
            
            VALUES{"No", "Yes", 0}},
        {0, 0, 0, 0, 0, 0}
    }
Mode Register (Mode) subfields.

See also:
Mode Register Description: UG380, v2.2, July 30, 2010, Table 5-44

Definition at line 109 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sBOOSTS [static, protected]

BOOSTS Register (BOOSTS) subfields.

See also:
BOOSTS Register Description: UG380, v2.2, July 30, 2010, Table 5-48

Definition at line 111 of file Spartan6.hpp.

const Bitstream::Subfield torc::bitstream::Spartan6::sSEU_OPT [static, protected]

Initial value:

 { 
        {0x0001,  0, "SEU_ENABLE", "SEU_ENABLE", 0, 
            
            
            VALUES{"DISABLE", "ENABLE", 0}},
        {0x0002,  1, "GLUT_MASK", "GLUT_MASK", 1, 
            
            
            VALUES{"Unmask", "Mask LUTRAM/SRL", 0}},
        {0x0008,  3, "SEU_RUN_ON_ERR", "SEU_RUN_ON_ERR", 0, 
            
            
            VALUES{"Halt", "Run", 0}},
        {0x0010,  4, "SEU_FREQ", "SEU_FREQ", 0, 
            
            
            VALUES{"1be",  0}},
        {0, 0, 0, 0, 0, 0}
    }
SEU_OPT Register (SEU_OPT) subfields.

See also:
SEU_OPT Register Description: UG380, v2.2, July 30, 2010, Table 5-49

Definition at line 113 of file Spartan6.hpp.

The documentation for this class was generated from the following files:
Generated on Thu Oct 13 16:49:47 2011 for TORC by  doxygen 1.5.6