TORC: torc/bitstream/VirtexBitstreamUnitTest.cpp Source File

00001 // Torc - Copyright 2011 University of Southern California.  All Rights Reserved.
00002 // $HeadURL: https://torc-isi.svn.sourceforge.net/svnroot/torc-isi/branches/staging/0.9/src/torc/bitstream/VirtexBitstreamUnitTest.cpp $
00003 // $Id: VirtexBitstreamUnitTest.cpp 10 2011-10-12 18:40:16Z nsteiner $
00004 
00005 // This program is free software: you can redistribute it and/or modify it under the terms of the 
00006 // GNU General Public License as published by the Free Software Foundation, either version 3 of the 
00007 // License, or (at your option) any later version.
00008 // 
00009 // This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; 
00010 // without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See 
00011 // the GNU General Public License for more details.
00012 // 
00013 // You should have received a copy of the GNU General Public License along with this program.  If 
00014 // not, see <http://www.gnu.org/licenses/>.
00015 
00016 /// \file
00017 /// \brief Unit test for the VirtexBitstream class.
00018 
00019 #include <boost/test/unit_test.hpp>
00020 #include "torc/bitstream/VirtexBitstream.hpp"
00021 #include "torc/bitstream/Virtex5.hpp"
00022 #include "torc/common/DirectoryTree.hpp"
00023 #include "torc/common/DeviceDesignator.hpp"
00024 #include "torc/bitstream/OutputStreamHelpers.hpp"
00025 #include "torc/common/TestHelpers.hpp"
00026 #include <fstream>
00027 #include <iostream>
00028 
00029 /// \todo Remove this #include
00030 #include "torc/bitstream/Virtex.hpp"
00031 
00032 namespace torc {
00033 namespace bitstream {
00034 
00035 BOOST_AUTO_TEST_SUITE(bitstream)
00036 
00037 
00038 /// \brief Unit test for the VirtexBitstream class.
00039 BOOST_AUTO_TEST_CASE(VirtexBitstreamCrcUnitTest) {
00040     std::fstream fileStream("VirtexUnitTest.reference.bit", std::ios::binary | std::ios::in);
00041     Virtex bitstream;
00042     bitstream.read(fileStream, false);
00043     std::cout << bitstream << std::endl;
00044     bitstream.preflightPackets();
00045     BOOST_REQUIRE(true);
00046 }
00047 
00048 
00049 /// \brief Unit test for the VirtexBitstream class.
00050 BOOST_AUTO_TEST_CASE(VirtexBitstreamUnitTest) {
00051 
00052     // build the file paths
00053     boost::filesystem::path regressionPath 
00054         = torc::common::DirectoryTree::getExecutablePath() / "regression";
00055     boost::filesystem::path generatedPath = regressionPath / "VirtexBitstreamUnitTest.generated.bit";
00056     boost::filesystem::path referencePath = regressionPath / "Virtex5UnitTest.reference.bit";
00057 
00058     // read the reference bitstream
00059     std::fstream fileStream1(referencePath.string().c_str(), std::ios::binary | std::ios::in);
00060     BOOST_REQUIRE(fileStream1.good());
00061     Virtex5 bitstream1;
00062     bitstream1.read(fileStream1, false);
00063     // find the type 2 write packet
00064     VirtexPacket frameContents;
00065     Virtex5::const_iterator p = bitstream1.begin();
00066     Virtex5::const_iterator e = bitstream1.end();
00067     while(p < e) { 
00068         if(p->isType2() && p->isWrite()) { frameContents = *p; break; }
00069         p++;
00070     }
00071 
00072     // declare a bitstream of unspecified architectures
00073     VirtexBitstream bitstream;
00074     // prepare the bitstream header
00075     bitstream.setDesignName("Virtex5UnitTest.reference.ncd;UserID=0xFFFFFFFF");
00076     bitstream.setDeviceName("5vlx20tff323");
00077     bitstream.setDesignDate("2010/10/08");
00078     bitstream.setDesignTime("15:06:11");
00079 
00080     // construct and add packets to the bitstream
00081     VirtexPacket dummy(Virtex5::eSynchronizationDummy);
00082     VirtexPacket nop(VirtexPacket::makeHeader(Virtex5::ePacketType1, Virtex5::eOpcodeNOP, 
00083         0, 0));
00084     // dummy words
00085     bitstream.insert(bitstream.end(), 8, dummy);
00086     // bus width detect
00087     bitstream.push_back(VirtexPacket(Virtex5::eSynchronizationBusWidthSync));
00088     bitstream.push_back(VirtexPacket(Virtex5::eSynchronizationBusWidthDetect));
00089     bitstream.push_back(dummy);
00090     bitstream.push_back(dummy);
00091     // sync
00092     bitstream.push_back(VirtexPacket(Virtex5::eSynchronizationSync));
00093     bitstream.push_back(nop);
00094     // warm boot register
00095     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterWBSTAR, 0));
00096     // NULL command
00097     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, Virtex5::eCommandNULL));
00098     bitstream.push_back(nop);
00099     // reset CRC command
00100     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, Virtex5::eCommandRCRC));
00101     bitstream.push_back(nop);
00102     bitstream.push_back(nop);
00103     // watchdog timer
00104     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterTIMER, 0));
00105     // undocumented register 19
00106     bitstream.push_back(VirtexPacket::makeType1Write(19, 0));
00107     // configuration options register 0
00108     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCOR0, 
00109             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "CRC", "Enable") |
00110             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "DONE_status", "DonePin") |
00111             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "DonePipe", "No") |
00112             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "DriveDone", "No") |
00113             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "Capture", "Continuous") |
00114             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "ConfigRate", "[UNKNOWN 0]") |
00115             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "StartupClk", "Cclk") |
00116             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "DONE_cycle", "4") |
00117             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "Match_cycle", "NoWait") |
00118             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "LCK_cycle", "NoWait") |
00119             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "GTS_cycle", "5") |
00120             Virtex5::makeSubfield(Virtex5::eRegisterCOR0, "GWE_cycle", "6") |
00121         0));
00122     // configuration options register 1
00123     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCOR1, 
00124             Virtex5::makeSubfield(Virtex5::eRegisterCOR1, "PersistDeassertAtDesynch", "Disabled") |
00125             Virtex5::makeSubfield(Virtex5::eRegisterCOR1, "InitAsCRCErrorPin", "Disabled") |
00126             Virtex5::makeSubfield(Virtex5::eRegisterCOR1, "ContinuousReadbackCRC", "Disabled") |
00127             Virtex5::makeSubfield(Virtex5::eRegisterCOR1, "BPI_1st_read_cycle", "1") |
00128             Virtex5::makeSubfield(Virtex5::eRegisterCOR1, "BPI_page_size", "1") |
00129         0));
00130     // write the ID code
00131     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterIDCODE, 0x02a56093));
00132     // clock and rate switch command
00133     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00134         Virtex5::eCommandSWITCH));
00135     bitstream.push_back(nop);
00136     // control register 0 mask
00137     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterMASK, 
00138             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "ICAP_sel", "Protected") |
00139             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "OverTempPowerDown", "Protected") |
00140             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "GLUTMASK", "Protected") |
00141             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Encrypt", "Protected") |
00142             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Security", "Protected") |
00143             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Persist", "Protected") |
00144             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "GTS_USER_B", "Protected") |
00145             0x00400000 | // no documentation available for this subfield
00146         0));
00147     // control register 0
00148     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCTL0, 
00149             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "ICAP_sel", "Top") |
00150             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "OverTempPowerDown", "Disable") |
00151             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "GLUTMASK", "Masked") |
00152             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Encrypt", "No") |
00153             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Security", "None") |
00154             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Persist", "No") |
00155             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "GTS_USER_B", "IoDisabled") |
00156             0x00400000 | // no documentation available for this subfield
00157         0));
00158     // control register 1 mask
00159     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterMASK, 0));
00160     // control register 1
00161     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCTL1, 0));
00162     // more NOPs
00163     bitstream.insert(bitstream.end(), 8, nop);
00164     // frame address register
00165     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterFAR, 0));
00166     // enable configuration write command
00167     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, Virtex5::eCommandWCFG));
00168     bitstream.push_back(nop);
00169     // write 0 bytes to FDRI (in preparation for type 2 write packet)
00170     bitstream.push_back(VirtexPacket::makeNullType1Write(Virtex5::eRegisterFDRI));
00171     // write 0 bytes to FDRI (in preparation for type 2 write packet)
00172 //  // note that we do not release the buffer as it will be taken over by the packet
00173 //  size_t length = 0x0002fa06;
00174 //  uint32_t* buffer = new uint32_t[length];
00175 //  uint32_t* ptr = buffer + length - 1;
00176 //  while(ptr >= buffer) *ptr-- = 0;
00177 //  bitstream.push_back(VirtexPacket::makeType2Write(0x0002fa06, buffer));
00178     bitstream.push_back(frameContents);
00179     // write the CRC value
00180     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCRC, 0x2d63e9d));
00181     // restore command
00182     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00183         Virtex5::eCommandGRESTORE));
00184     bitstream.push_back(nop);
00185     // last frame command
00186     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00187         Virtex5::eCommandLFRM));
00188     bitstream.insert(bitstream.end(), 100, nop);
00189     // another restore command
00190     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00191         Virtex5::eCommandGRESTORE));
00192     bitstream.insert(bitstream.end(), 30, nop);
00193     // start command
00194     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00195         Virtex5::eCommandSTART));
00196     bitstream.push_back(nop);
00197     // frame address register
00198     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterFAR, 0x00ef8000));
00199     // control register 0 mask
00200     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterMASK, 
00201             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "ICAP_sel", "Protected") |
00202             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "OverTempPowerDown", "Protected") |
00203             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "GLUTMASK", "Protected") |
00204             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Encrypt", "Protected") |
00205             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Security", "Protected") |
00206             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "Persist", "Protected") |
00207             Virtex5::makeSubfield(Virtex5::eRegisterMASK, "GTS_USER_B", "Protected") |
00208             0x00400000 | // no documentation available for this subfield
00209         0));
00210     // control register 0
00211     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCTL0, 
00212             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "ICAP_sel", "Top") |
00213             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "OverTempPowerDown", "Disable") |
00214             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "GLUTMASK", "Masked") |
00215             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Encrypt", "No") |
00216             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Security", "None") |
00217             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "Persist", "No") |
00218             Virtex5::makeSubfield(Virtex5::eRegisterCTL0, "GTS_USER_B", "IoDisabled") |
00219             0x00400000 | // no documentation available for this subfield
00220         0));
00221     // write the CRC value
00222     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCRC, 0x0c90449e));
00223     // desynch command
00224     bitstream.push_back(VirtexPacket::makeType1Write(Virtex5::eRegisterCMD, 
00225         Virtex5::eCommandDESYNCH));
00226     bitstream.insert(bitstream.end(), 61, nop);
00227 
00228     // write the bitstream back out
00229     std::fstream outputStream(generatedPath.string().c_str(), std::ios::binary | std::ios::out);
00230     BOOST_REQUIRE(outputStream.good());
00231     bitstream.write(outputStream);
00232     outputStream.flush();
00233 
00234     /* read the bitstream
00235     std::fstream fileStream2(generatedPath.string().c_str(), std::ios::binary | std::ios::in);
00236     BOOST_REQUIRE(fileStream2.good());
00237     Virtex5 bitstream2;
00238     bitstream2.read(fileStream2, false);
00239     // write the bitstream digest to the console
00240     std::cout << bitstream2 << std::endl;
00241     */
00242     // compare the reference and generated XDL
00243     BOOST_CHECK(torc::common::fileContentsAreEqual(generatedPath, referencePath));
00244 
00245 }
00246 
00247 BOOST_AUTO_TEST_SUITE_END()
00248 
00249 } // namespace bitstream
00250 } // namespace torc
00251 
00252 /*
00253 Design Virtex5UnitTest.reference.ncd;UserID=0xFFFFFFFF (5vlx20tff323) @ 2010/10/08 15:06:11: 781400 bytes (195350 words)
00254     00000070: DUMMY
00255     00000074: DUMMY
00256     00000078: DUMMY
00257     0000007c: DUMMY
00258     00000080: DUMMY
00259     00000084: DUMMY
00260     00000088: DUMMY
00261     0000008c: DUMMY
00262     00000090: BUS WIDTH SYNC
00263     00000094: BUS WIDTH DETECT
00264     00000098: DUMMY
00265     0000009c: DUMMY
00266     000000a0: SYNC
00267     000000a4: NOP x 1
00268     000000a8: TYPE1 WRITE WBSTAR: 00000000 (RevisionSelectTristate:Disabled, NextRevisionSelect:00)
00269     000000b0: TYPE1 WRITE CMD NULL
00270     000000b8: NOP x 1
00271     000000bc: TYPE1 WRITE CMD RCRC
00272     000000c4: NOP x 2
00273     000000cc: TYPE1 WRITE TIMER: 00000000 (TimerForUser:Disabled, TimerForConfig:Disabled)
00274     000000d4: TYPE1 WRITE [UNKNOWN REG 19]: 00000000
00275     000000dc: TYPE1 WRITE COR0: 00003fe5 (CRC:Enable, DONE_status:DonePin, DonePipe:No, DriveDone:No, Capture:Continuous, ConfigRate:[UNKNOWN 0], StartupClk:Cclk, DONE_cycle:4, Match_cycle:NoWait, LCK_cycle:NoWait, GTS_cycle:5, GWE_cycle:6)
00276     000000e4: TYPE1 WRITE COR1: 00000000 (PersistDeassertAtDesynch:Disabled, InitAsCRCErrorPin:Disabled, ContinuousReadbackCRC:Disabled, BPI_1st_read_cycle:1, BPI_page_size:1)
00277     000000ec: TYPE1 WRITE IDCODE: 02a56093
00278     000000f4: TYPE1 WRITE CMD SWITCH
00279     000000fc: NOP x 1
00280     00000100: TYPE1 WRITE MASK: 00400000 (ICAP_sel:Protected, OverTempPowerDown:Protected, GLUTMASK:Protected, Encrypt:Protected, Security:Protected, Persist:Protected, GTS_USER_B:Protected)
00281     00000108: TYPE1 WRITE CTL0: 00400000 (ICAP_sel:Top, OverTempPowerDown:Disable, GLUTMASK:Masked, Encrypt:No, Security:None, Persist:No, GTS_USER_B:IoDisabled)
00282     00000110: TYPE1 WRITE MASK: 00000000 ()
00283     00000118: TYPE1 WRITE CTL1: 00000000 ()
00284     00000120: NOP x 8
00285     00000140: TYPE1 WRITE FAR: 00000000
00286     00000148: TYPE1 WRITE CMD WCFG
00287     00000150: NOP x 1
00288     00000154: TYPE1 WRITE FDRI: 00000000 words
00289     00000158: TYPE2 WRITE FDRI: 0002fa06 words
00290     000be974: TYPE1 WRITE CRC: 02d63e9d
00291     000be97c: TYPE1 WRITE CMD GRESTORE
00292     000be984: NOP x 1
00293     000be988: TYPE1 WRITE CMD DGHIGH/LFRM
00294     000be990: NOP x 100
00295     000beb20: TYPE1 WRITE CMD GRESTORE
00296     000beb28: NOP x 30
00297     000beba0: TYPE1 WRITE CMD START
00298     000beba8: NOP x 1
00299     000bebac: TYPE1 WRITE FAR: 00ef8000
00300     000bebb4: TYPE1 WRITE MASK: 00400000 (ICAP_sel:Protected, OverTempPowerDown:Protected, GLUTMASK:Protected, Encrypt:Protected, Security:Protected, Persist:Protected, GTS_USER_B:Protected)
00301     000bebbc: TYPE1 WRITE CTL0: 00400000 (ICAP_sel:Top, OverTempPowerDown:Disable, GLUTMASK:Masked, Encrypt:No, Security:None, Persist:No, GTS_USER_B:IoDisabled)
00302     000bebc4: TYPE1 WRITE CRC: 0c90449e
00303     000bebcc: TYPE1 WRITE CMD DESYNCH
00304     000bebd4: NOP x 61
00305 */